Performance
Table
LEG V8 datapath stages and their instruction times:
| Instruction | IF (200ps) | ID (100ps) | EX (200ps) | ME (200ps) | WB (100ps) | total |
|---|---|---|---|---|---|---|
ADD |
✓ | ✓ | ✓ | x | ✓ | 600ps |
LDR |
✓ | ✓ | ✓ | ✓ | ✓ | 800ps |
STR |
✓ | ✓ | ✓ | ✓ | x | 700ps |
CBZ |
✓ | ✓ | ✓ | x | x | 500ps |
- The clock period must be long enough for the instruction with longest propagation delay (800ps)
- At the end of a clock cycle, the PC, register file, and data memory latch their inputs
Benchmarking
Info
To compare performance of different processors, we compare execution times of standard programs (benchmarks)
Equation
Speedup