Polling IO

Polling involves repeatedly reading from a source at a continuous (and usually short) interval as a means of detecting changes

The program polls the devices status register until it is ready for an operation

Pseudocode:

poll: read status register
      check done bit
      if not set, goto poll
      read/write data register
      process the data
      goto poll   

ADDR
    EQU 0x40034010 ; EQU: equate defines a constant (like #define in c)
ADSTAT
    EQU 0x40034030
SAMPLES
    SPACE 100 ; Allocate 100B of memory

SETUP
    MOV32 R0, #ADDR
    MOV32 R1, #ADSTAT
    MOV32 R2, #SAMPLES ; (or LDR R2, =SAMPLES, or ADR R2, SAMPLES)

POLL
    LDR R3, [R1] ; Read status register (R3)
    TST R3, #1   ; Test bit 0 (see diagram 1)
    BEQ POLL     ; If Z (0) flag was set, keep polling. Otherwise, fall-through to process.

PROCESS
    LDR R3, [R0]        ; Read data register (want bits 4-15)
    AND R3, #0x0000FFF0 ; Need to zero the other bits
    LSR R3, #4          ; Shift to move bits 4-15 to beginning (see diagram 2)
    STR R3, [R2], #4
    B   POLL

• ADC samples at
• Processor clock rate is
• Instructions take 1 cycle, except branches take 2 cycles

If all time is spent polling (no processing), how many polling loop iterations are there per sample? If processing each sample takes 6 cycles, what fraction of time is spent polling?

solution

1. Polling cycles = 1 (LDR) + 1 (TST) + 2 (BEQ) = 4 cycles

t_{\text{sample}} & = \frac{1}{f_{s}} = \sci{5}{-6} \mathrm{s} \
t_{\text{process}} & = \frac{6 \mathrm{cycles}}{\sci{25}{6} \mathrm{\frac{cycles}{s}}} = \sci{2.4}{-7} \mathrm{s} \
t_{\text{poll}} & = t_{\text{sample}} - t_{\text{process}} \
\text{% time polling} & = \frac{t_{\text{poll}}}{t_{\text{sample}}} = \frac{\sci{4.76}{-6}\mathrm{s}}{\sci{5}{-6} \mathrm{s}} = 95.2 %
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