Synthesis of ASCs

The opposite of analysis.

Procedure

  1. Devise a state diagram
  2. Derive a flow table and reduce states if possible
  3. Perform state assignment to get an excitation table
  4. Obtain the next-state and output expressions

Example - Serial Parity Generator

Circuit Specification

  • The system has an input and an output
  • When pulses are applied to :
    • The output is equal to if the number of previously applied pulses is even
    • The output is equal to if the number of previously applied pulses is odd

Assume a Moore machine.


Devising a state diagram:

  • Let be the state that indicated that an even number of pulses were received
    • State produces output as long as , so it is stable at
  • When the next pulse arrives (), we move to the next state which we will call
    • State produces output as long as , so it is stable at
  • Next, the pulse ends (), we move to another state
    • State produces output as long as , so it is stable at
  • When the next pulse arrives (), we move to another state
    • State produces output as long as , so it is stable at
  • When the pulse ends (), we move back to state

State diagram:

Flow table:

Now we need to do some state assignments. If we tried , , , , this would be a bad choice. We know that a transition from to and to in fundamental mode will cause a race condition (bad), since only one variable can change at a time.

Better state assignment: , , , .

We can write:

We arrive at the circuit: